Pattern detection for integrated circuit substrates

Details Pattern detection for integrated circuit substrates Pattern detection for integrated circuit substrates

2007-10-02

2007-10-02

Tsai, Carol S. W. (Department: 2863)

Data processing: measuring, calibrating, or testing

Testing system

Of circuit

Reexamination Certificate

active

11116591

ABSTRACT:
A method for selecting test site locations on a substrate, by a) specifying a subset of all test site locations on the substrate, and b) selecting a desired number of candidate test site locations from within the subset of test site locations on the substrate. c) While selecting one of the candidate test site locations and holding all others of the candidate test site locations as fixed, determining a new location for the selected one of the candidate test site locations, which new location increases a test sensitivity, as estimated by a trace of a variance-covariance matrix. d) Repeating step (c) for each candidate test site location in the subset of test site locations, to produce a finalized set of candidate test site locations, until a desired end point is attained.

REFERENCES:
patent: 2006/0064268 (2006-03-01), Dorough et al.

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