Pattern data compression and decompression for semiconductor tes

Details Pattern data compression and decompression for semiconductor tes Pattern data compression and decompression for semiconductor tes

1997-08-15

1999-03-16

Beausoliel, Jr., Robert W.

Excavating

39518308, G01R 3128

Patent

active

058839062

ABSTRACT:
A compression and decompression apparatus to be used for transferring test pattern data from a storage device of a host computer to a pattern memory in a semiconductor test system for testing a semiconductor device to decrease the time required for the data transfer. The compression and decompression apparatus includes: a compression means for classifying vector data in the test pattern data into a first group to be compressed to a short code and a second group not to be compressed, and for producing a look-up table showing relationship between the short code and the vector data in the first group; a compressed test pattern file storing compressed test pattern including the short code, data vector in the second group and the look-up table; and a hardware decompression circuit provided in the semiconductor test system or proximity thereto for decompressing the compressed test pattern based on the short code and the relationship shown in the look-up table and for sending decompressed test pattern to the pattern memory in the semiconductor test system.

REFERENCES:
patent: 5151903 (1992-09-01), Mydill et al.
patent: 5301199 (1994-04-01), Ikenaga et al.
patent: 5499248 (1996-03-01), Behrens et al.
patent: 5719881 (1998-02-01), Yonetoku
patent: 5737512 (1998-04-01), Proudfoot et al.

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