Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-09-21
2003-09-16
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06622297
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-301305, filed Sep. 29, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a technology for designing a photo-mask used in manufacturing of semiconductors and, more particularly to, a pattern correcting method and a pattern verifying method for compensating the optical proximity effect.
2. Description of the Related Art
Conventionally, such a technology for compensating the optical proximity effect is known as disclosed in “OPTIMASK: An OPC Algorithm for Chrome and Phase-Shifting Mask Design” by Eytan Barouch et al. in a literature Proc. SPIE-Int. Soc. Opt. Eng (USA) vol. 2440, pp. 192-206 (1995). In this literature, such an automatic optical proximity effect correcting method is discussed as comprising the steps of performing exposure simulation on a design pattern, subsequently extracting an edge portion (hereinafter called error edge) where a difference between the simulation image and a design pattern is larger than a prescribed threshold value, and moving the error edge by as much as a correction value calculated on the basis of the simulation to thereby correct the proximity effect.
In illumination of a shape that has no rotation symmetry at any given angle around an optical axis, as the center, of an illumination optics or a projection optics, there occurs a problem that a symmetrical pattern cannot be transferred onto the wafer symmetrically. Moreover, there are many cases where data having a hierarchical structure may have a cell which is arranged with setting of a conversion parameter such as a rotational arrangement or mirroring parameter. In such a case, if a hierarchical operation is simply used to perform Optical Proximity Correction (OPC) or transfer simulation under the above-mentioned illumination conditions, no rotation or mirroring is taken into account, so that a direction as viewed on an actual mask may not agree with a correcting direction. In this case, no correct OPC or transfer simulation can be performed, so that a mask created as a result may greatly decrease the wafer production yield.
Furthermore, the above-mentioned literature can be applied to the flat design data having no hierarchical structure, because the flat design data need not take directional dependency into account. About the design having a hierarchical structure, however, no description of a hierarchical operation is mentioned in the literature, so that it is not assured whether correction is possible, or whether proper correction is possible in any given direction on the surface of a wafer.
Thus, in such a case where a symmetrical pattern cannot be transferred symmetrically as in a case of employing illumination with a shape having no rotational symmetry at any given angle around an optical axis, as the center, of an illumination optics or a projection optics, OPC or transfer simulation is impossible with data having a hierarchical structure, thus resulting in a problem of a decrease in the yield of semiconductor manufacturing.
In view of the above, there is a need to provide a pattern correcting method and a pattern verifying method that can perform pattern correction or simulation accurately on data having a hierarchical structure even in a case where such an exposure apparatus is used that have different transfer properties with different directions in which mask patterns are arranged, thus contributing to an improvement in the yield of semiconductor manufacturing.
BRIEF SUMMARY OF THE INVENTION
The pattern correcting method according to a first aspect of the present invention, using an exposure apparatus which has a different transfer property in accordance with a mask pattern arranging direction in a lithography process, comprising:
preparing a design pattern data;
discriminating whether the pattern data of a designed pattern layout has a hierarchical structure including a reference cell or not;
discriminating whether a cell or a pattern in the reference cell has a designation of rotation or mirroring with respect to an x axis or a y axis orthogonal to the x axis or not, when the reference cell is included;
registering a cell or a pattern data after the rotation or the mirroring is effected as a new cell or a new pattern, when the rotation or the mirroring is designated;
replacing the cell or the pattern having the designation of the rotation or the mirroring to the new cell or the new pattern; and
performing correction with the pattern data after the replacing.
The pattern verifying method according to a second aspect of the present invention, using an exposure apparatus which has a different transfer property in accordance with a mask pattern arranging direction in a lithography process, comprising:
preparing a pattern data of a designed pattern layout;
discriminating whether the pattern data has a hierarchical structure including a reference cell or not;
discriminating whether a cell or a pattern in the reference cell has a designation of rotation or mirroring with respect to an x axis or a y axis orthogonal to the x axis or not, when the reference cell is included;
registering a cell or a pattern data after the rotation or the mirroring is effected as a new cell or a new pattern, when the rotation or the mirroring is designated;
replacing the cell or the pattern having the designation of the rotation or the mirroring with the new cell or the new pattern;
simulating a transfer pattern to be formed on a wafer; and
comparing simulated data to the pattern data.
The pattern correcting system according to a third aspect of the present invention, using an exposure apparatus which has a different transfer property in accordance with a mask pattern arranging direction in a lithography process, comprising:
means for discriminating whether a pattern data has a hierarchical structure including a reference cell or not, the pattern data being based on a desired pattern layout;
means for discriminating whether a cell or a pattern in the reference cell has a designation of rotation or mirroring with respect to an x axis or a y axis orthogonal to the x axis or not, when the reference cell is included;
means for registering a cell or a pattern data after the rotation or the mirroring is effected as a new cell or a new pattern, when the rotation or the mirroring is designated; and
means for performing correction to the design pattern data based on the new cell or the new pattern.
Furthermore, the pattern verifying system according to a fourth aspect of the present invention, using an exposure apparatus which has a different transfer property in accordance with a mask pattern arranging direction in a lithography process, comprising:
means for discriminating whether a pattern data has a hierarchical structure including a reference cell or not, the pattern data being based on a desired pattern layout;
means for discriminating whether a cell or a pattern in the reference cell has a designation of rotation or mirroring with respect to an x axis or a y axis orthogonal to the x axis or not, when the reference cell is included;
means for registering a cell or a pattern data after the rotation or the mirroring is effected as a new cell or a new pattern, when the rotation or the mirroring is designated; and
means for effecting transfer simulation to the pattern data based on the new cell or the new pattern.
REFERENCES:
patent: 5253182 (1993-10-01), Suzuki
patent: 5307184 (1994-04-01), Nishiwaki et al.
patent: 6223327 (2001-04-01), Yamaji
patent: 02000241959 (2000-09-01), None
Eytan Barouch, et al., “Optimask: An OPC Algorithm for Chrome and Phase-Shift Mask Design”, SPIE vol. 2440, pp. 192-206, 1995.
Kobayashi Sachiko
Tanaka Satoshi
Uno Taiga
Yamamoto Kazuko
Lin Sun James
Smith Matthew
LandOfFree
Pattern correcting method and pattern verifying method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Pattern correcting method and pattern verifying method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pattern correcting method and pattern verifying method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3029167