Pattern-block flux deposition

Details Pattern-block flux deposition Pattern-block flux deposition

2000-10-26

2001-12-25

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S106000

Reexamination Certificate

active

06333253

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor assembly technology, and more particularly to flip-chip interconnections between a semiconductor chip and a substrate.
BACKGROUND OF THE INVENTION
A common task in the manufacture of microelectronic components involves the manufacture of single chip or multi-chip modules having input/output pins which are inserted into a substrate. The input/output pins provide the needed electrical connections to the integrated circuit chips which are subsequently connected to the substrate or carrier. In other presently known manufacturing processes, a chip is soldered directly to a printed circuit board. With either process, solder flux compositions have typically been applied to the pins in order to connect the component to the selected substrate, for instance, the printed circuit board.
As electronic devices become smaller and denser, greater demands are placed on the ability to establish efficient, reliable interconnections from a semiconductor chip to a substrate. There are three well-known methods for interconnecting chips to a substrate. The three methods are (a) face-up wire bonding, (b) face-up tape-automated bonding, and (c) the flip-chip method. Among these three methods, the flip-chip method has frequently been chosen as a preferred method of semiconductor packaging since it allows the interconnection of a high density device having a large number of input and output paths. Specifically, the flip-chip method is often preferred because it provides short conductivity leads from the chip to the substrate, a small device footprint, low inductance, high frequency capabilities, and good noise control.
As shown in
FIG. 2
, a flip-chip is a semiconductor chip
10
that is mounted onto a substrate
18
with the surface of the chip
10
facing the substrate
18
. Although several materials may be used to form an interconnection between the flip-chip
10
and the substrate
18
, solder is one of the more commonly employed materials for a flip-chip bump
12
. In the solder interconnection process termed “controlled-collapse chip connection (C4)”, the solder flip-chip bump
12
is deposited on a conductive terminal on the semiconductor chip
10
. Then the semiconductor chip
10
is aligned with the substrate
18
so that the solder flip-chip bump
12
is directly over a flip-chip pad
20
of the substrate
18
. The flip-chip bump
12
is then tacked to the substrate
18
and reflowed in the presence of flux, creating an electrical and mechanical connection from the chip
10
to the substrate
18
as well as a path for heat dissipation.
Typically, the chip-substrate joining process involves application of flux on the chip
10
and/or the flip-chip pads
20
of the substrate
18
. As shown in
FIG. 1
, flux
16
is sprayed over the entire surface of the semiconductor chip
10
by a jet sprayer
14
, including the previously formed flip-chip bumps
12
. Then, the chip
10
is aligned to the substrate
18
having flip-chip pads
20
on its surface, which is further facilitated by the flux viscosity and tackiness. The chip-substrate assembly is then subjected to solder reflow in a furnace under nitrogen or forming gas. In the subsequent cooling cycle of the thermal profile for joining, the solder hardens and at the same time, the residual flux vapors deposit on the various exposed surfaces. Under the high temperature solder reflow environment, the flux is mostly removed by thermal decomposition to volatile species. However, a small fraction of these thermally activated species undergoes cross-linking reactions, resulting in resinous/carbonaceous byproducts as residue
22
(
FIG. 2
) on the C4 connections and all of the other surfaces on the chip
10
and the substrate
18
that are exposed to the volatile species during the solder reflow professing. The flux residue
22
must be removed from all critical surfaces prior to further operation, otherwise it can lead to function failure during long term use due to stress corrosion during exposure to temperature and humidity conditions. Further need for removal of flux residue is dictated by the observation that if any residual film of flux residue remains on the substrate or device surface material, it cause detriment to the adhesion of C4 epoxy encapsulant or underfill which is required for enhanced C4 fatigue life and C4 reliability during production on-off cycles.
Therefore, there exists a need for improved and production worthy methodology which removes flux residue from all critical surfaces.
SUMMARY OF THE INVENTION
These and other needs are met by the present invention which provides a method of selectively depositing flux on a plurality of flip-chip bumps to reduce flux residue from critical areas of the chip surface and an apparatus for the same purpose.
In accordance with the method of the present invention, the semiconductor chip is masked to selectively expose the plurality of flip-chip bumps. Flux is selectively deposited on the exposed plurality of flip-chip bumps. In certain embodiment of the present invention, the semiconductor chip is masked by positioning a flux stamp, which has a plurality of flux holes arranged so as to selectively expose the plurality of flip-chip bumps, on the surface of the semiconductor chip. Flux is then jet sprayed or manually brushed on the plurality of flip-chip bumps through the plurality of flux holes.
The apparatus in accordance with the present invention, comprises a flux stamp masking the surface of the semiconductor chip to selectively expose the plurality of flip-chip bumps, and a fluxer depositing flux on the exposed plurality of flip-chip bumps. In certain embodiments of the present invention, the flux stamp includes a plurality of flux holes arranged in a pattern identically corresponding to an arrangement pattern of the plurality of flip-chip bumps. A fluxer is also provided to deposit flux on the plurality of flip-chip bumps through the plurality of flux holes of the flux stamp.
Hence, flux is selectively deposited on the flip-chip bumps. This has an advantage of reducing flux residue remaining on the surface of both chip and substrate, thereby reducing the risk of the device's functional failure during long term use due to stress corrosion caused by exposure to temperature and humidity, thus achieving enhanced C4 fatigue life and C4 reliability during production on-off cycle. This invention has an advantage that the flux stamp can be easily incorporated to the conventional flux deposition process. Further the flux stamp can be prepared at a relatively inexpensive price without involving a complicated manufacturing process.
Additional advantages of the present invention will become readily apparent to those skilled in the art from the following detailed description, wherein only the preferred embodiment of the present invention is shown and described, simply by way of illustration of the best mode contemplated for carrying out the present invention. As will be realized, the invention is capable of other and different embodiments and its several details are capable of modifications in various obvious respects, all without departing from the present invention. Accordingly the drawings and description are to be regarded as illustrative in nature, and not as restrictive.


REFERENCES:
patent: 4151945 (1979-05-01), Regard et al.
patent: 5482736 (1996-01-01), Glenn et al.
patent: 5629241 (1997-05-01), Matloubian et al.
patent: 5904510 (1999-05-01), Merril et al.
patent: 6103549 (2000-08-01), Master et al.

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