Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Patent
1998-05-22
2000-07-18
Lee, Thomas C.
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
39550048, 710 62, 710101, 710104, 710126, G06F 1338
Patent
active
060921390
ABSTRACT:
A computer system includes a bus system having a local bus unit, a memory bus unit, an input/output bus unit, and an expansion bus unit. A pluggable central processing unit circuit board includes a microprocessor, a pluggable memory circuit board coupled to the central processing unit circuit board through the memory bus unit, and a pluggable bridge circuit board coupled to the central processing unit circuit board. A plurality of connectors includes a first connector unit for receiving the pluggable central processing unit circuit board; a second connector unit for receiving the pluggable memory circuit board; and a third connector unit for receiving the pluggable bridge circuit board. The third connector unit is coupled to the first connector unit of the central processing unit circuit board through the bus system. A plurality of peripheral devices are coupled to the bridge circuit board through the input/output bus unit. The bus system includes a variable data path width corresponding to a data size of the central processing unit circuit board.
REFERENCES:
patent: 4979075 (1990-12-01), Murphy
patent: 5065141 (1991-11-01), Whitsitt
patent: 5119498 (1992-06-01), McNeill et al.
patent: 5167511 (1992-12-01), Krajewski et al.
patent: 5192220 (1993-03-01), Billman et al.
patent: 5301281 (1994-04-01), Kennedy
patent: 5617546 (1997-04-01), Shih et al.
patent: 5625802 (1997-04-01), Cho et al.
patent: 5630163 (1997-05-01), Fung et al.
M.J. Doughterty, "A Sem-E Module Avionics Computer with PI-Bus Backplane Communication", Institute of Electrical and Electronics Engineers, May 21-25, 1990, pp. 169-173.
D. Eidsmore, "MC68000 and Z80A Share Multiprocesor Bus in S-100 SBC Line", Computer Design, Jun. 1982, Winchester, Massachusetts, vol. 21, No. 6, pp. 38-40.
Y. Belopolsky, "Interaction of Multichip Module Substrates with High-density Connectors" of IEEE Micro, Apr. 1993, vol 13, No. 2, ISSN 0272-1732, pp. 36-44.
C. Van Veen, "LRU Servicing Practice Impacts Interconnection", Electronic Product Design, Jun. 1992, UK., vol 13, No. 6, ISSN 0263-1474, pp. 45-47.
E. Baker and J. Shakib, "Input/Output Cards for Device Attachments", IBM Technical Disclosure Bulletin, vol. 27, No. 4b, Sep. 1984, New York, pp. 2406-2407.
M. Ernstberger et al., "The High Density Backplane Interconnect System", Connection Technology, Aug. 1991, vol. 7, No. 8, ISSN 8756-4076, pp. 19-21.
Readout, "Board Level Options for RISC processors", Electronic Engineering 61, Mar. 1989, NO. 747, Woolwich, London, GB, pp. 71-72.
C. Van Veen, "Making the Right Packaging Connections with Backplane Interconnections,"Electronic Packaging & Production, Newton, MA, May 1991, pp. 76-79.
Crane, Jr. Stanford W.
Smith Bruce A.
Vanderslice Edward R.
Lee Thomas C.
Yuan Chien
LandOfFree
Passive backplane capable of being configured to a variable data does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Passive backplane capable of being configured to a variable data, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Passive backplane capable of being configured to a variable data will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2048660