Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-12-31
2000-11-07
Everhart, Caridad
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438436, 438613, 438623, H01L 2144
Patent
active
061436380
ABSTRACT:
A novel passivation structure and its method of fabrication. According to the present invention a first dielectric layer is formed upon a conductive layer formed over a substrate. The first dielectric layer and the conductive layer are then patterned into a first dielectric capped interconnect and a dielectric capped bond pad. Next, a second dielectric layer is formed over and between the dielectric capped interconnect and the dielectric capped bond pad. The top portion of the second dielectric layer is removed so as to expose the dielectric capped bond pad and the dielectric capped interconnect. A third dielectric layer is then formed over the exposed dielectric capped bond pad and the exposed dielectric capped interconnect and over the second dielectric.
REFERENCES:
patent: 5565378 (1996-10-01), Harada et al.
patent: 5661082 (1997-08-01), Hsu et al.
patent: 5677239 (1997-10-01), Isobe
patent: 5728631 (1998-03-01), Wang
patent: 5985765 (1999-11-01), Hsiao et al.
Everhart Caridad
Intel Corporation
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