Passivation of porous semiconductors for improved optoelectronic

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

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438 22, C25F 312

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active

058343784

ABSTRACT:
A method for substantially improving the photo luminescent performance of a porous semiconductor, involving the steps of providing a bulk semiconductor substrate wafer of a given conductivity, wherein the substrate wafer has a porous semiconductor layer of the same conductivity as the bulk semiconductor substrate wafer, and the porous semiconductor layer is made up of a plurality of pores interspersed within a plurality of nanocrystallites, wherein each of the pores its defined by a pore wall and each of the nanocrystallites has a given thickness. Next, in the method, at least one monolayer layer of passivating material is generated on the pore wall of each of the pores, to passivate the porous semiconductor layer. The one layer of passivating material substantially eliminates dangling bonds and surface states which are associated with the porous semiconductor layer. The resulting passivated porous semiconductor layer exhibits a quantum efficiency of approximately 5 percent. In one embodiment of the present invention, the one monolayer of passivating material is an oxide which is generated by placing the bulk semiconductor substrate wafer into a furnace set a predetermined temperature and a predetermined pressure; introducing dry oxygen into the furnace for predetermined time period to grow the one monolayer of oxide on the pore wall of each of the pores; and cooling the substrate wafer at an ambient temperature and an ambient pressure. The predetermined time period is approximately 5 minutes. Also described is a heterojunction light emitting diode device which employs a passivated porous semiconductor layer made as described above and a method for fabricating same.

REFERENCES:
patent: 5298767 (1994-03-01), Shor et al.
patent: 5331180 (1994-07-01), Yamada et al.
patent: 5376241 (1994-12-01), Shor et al.
patent: 5427977 (1995-06-01), Yamada et al.
patent: 5454915 (1995-10-01), Shor et al.
patent: 5644156 (1997-07-01), Suzuki et al.
patent: 5685946 (1997-11-01), Fathauer et al.

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