Passivation layer assembly on a substrate and display...

Details Passivation layer assembly on a substrate and display... Passivation layer assembly on a substrate and display...

2005-09-29

2008-12-16

Pham, Thanhha (Department: 2894)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S059000, C257S774000, C257SE29117

Reexamination Certificate

active

07466026

ABSTRACT:
A passivation layer assembly and a display substrate having the same are presented. The passivation layer assembly is positioned on a substrate having a thin film assembly and protects the thin film assembly. The thin film assembly includes a first passivation layer and a second passivation layer. The first passivation layer contacts the thin film assembly. The first passivation layer has a first etching rate with respect to an etching agent. The second passivation layer is on the first passivation layer. The second passivation layer has a second etching rate that is higher than the first etching rate with respect to the etching agent. The passivation assembly decrease the malfunction rate of the display device.

REFERENCES:
patent: 6180997 (2001-01-01), Lin
patent: 6265247 (2001-07-01), Nakanishi et al.
patent: 6900853 (2005-05-01), Watanabe et al.
patent: 2001/0030717 (2001-10-01), Kaneko et al.
patent: 2002/0140895 (2002-10-01), Kimura et al.

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