Pass transistor for a 256 megabit dram with negatively biased su

Details Pass transistor for a 256 megabit dram with negatively biased su Pass transistor for a 256 megabit dram with negatively biased su

1994-12-19

1996-08-20

Clawson, Jr., Joseph E.

Static information storage and retrieval

Systems using particular element

Capacitors

365182, 36518909, 257327, G11C 11401

Patent

active

055485480

ABSTRACT:
A design to attain a pass transistor for a 256 Mbit DRAM part. The transistor having a gate length of about 0.3 .mu.m, a t.sub.ox of about 85 .ANG., which is much thicker than the .about.65 .ANG. t.sub.ox for 0.25 .mu.m logic technology, a V.sub.WL of 3.75 V, a V.sub.sub of -1 V, arsenic LDD and a boron concentration in the channel region of about 2.7.times.10.sup.17 /cm.sup.3 are the desired technological choices for 256 Mbit DRAM devices.

REFERENCES:
patent: 5274586 (1993-12-01), Matsukawa
patent: 5309386 (1994-05-01), Yusuki et al.
patent: 5323343 (1994-06-01), Ogoh et al.
R. Dennard et al., "1.mu.m Mosfet VLSI. . . Applications," IEEE J. of S.-S. CKTS, vol. Sc-14, #2, Apr. 1979, pp. 247-255.
M. Konaka et al., "Suppression of Anomalous Organ Current in Short Chan. Mosfet," Jap. J.A.P., vol. 18, 1979, Supl. 16-1, pp. 27-33.
B. Hoeneisen et al., "Fundamental Limitations in Microelectronics-I. Mos Tech.," Solid-State Electronics, 1972, vol. 15, pp. 819-829.
Kawakara et al., Subthreshold Current Reduction for Decoded-Driver by Self-Reverse Biasing, IEEE Journal of Solid-State Circuits, vol. 28, No. 11, Nov. 1993, pp. 1136-1143.
Rodder et al., Oxide Thickness Dependence of Inverter Delay and Device Reliability for 0.25.mu.m CMOS Technology, IEDM 93, pp. 879-882.

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