Pass gate with improved latchup immunity

Details Pass gate with improved latchup immunity Pass gate with improved latchup immunity

2009-05-12

2010-10-12

Cho, James (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

C326S031000

Reexamination Certificate

active

07812642

ABSTRACT:
An integrated circuit includes a pass gate having an input and an output. An NMOS pass transistor is connected between the input and the output. The drain of the NMOS pass transistor is connected to the input and the source of the NMOS pass transistor is connected to a node between the source of the NMOS transistor and the output of the pass gate. A current clamp is connected between the node and a current sink so as to conduct current to the current sink when the node reaches a threshold value.

REFERENCES:
patent: 5880620 (1999-03-01), Gitlin et al.
patent: 6965263 (2005-11-01), Bringivijayaraghavan
patent: 7355437 (2008-04-01), Perisetty
patent: 7417909 (2008-08-01), Byeon et al.
patent: 7446991 (2008-11-01), Chen
patent: 7501852 (2009-03-01), Suzuki et al.
patent: 2008/0188045 (2008-08-01), Morris

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