Pass gate input buffer for a mixed voltage environment

Details Pass gate input buffer for a mixed voltage environment Pass gate input buffer for a mixed voltage environment

1997-12-31

2000-02-29

Tokar, Michael

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 68, 326 83, H03K 190175, H03K 19094

Patent

active

060313935

ABSTRACT:
An input buffer to interface among devices on a main circuit board is described. The input buffer includes a first transistor coupled between a first terminal and an input terminal of an inverter. The first transistor has an enable terminal adapted to be coupled to a first voltage supply. A second transistor that is coupled between the first terminal and the input terminal is also included. The input buffer further includes a control circuit to enable the second transistor. The control circuit is coupled to the first terminal, an enable terminal of the second transistor, the input terminal, and an output terminal of the inverter. A method for buffering signals among devices on a main circuit board comprises receiving a first signal in a first state from a first device. A first portion of the first signal is transmitted through a first transistor. A second portion of the first signal is transmitted through a second transistor. A second signal is generated by applying the first signal to the enable terminals of the third and fourth transistors. The second signal is then transmitted to a second device.

REFERENCES:
patent: 4574273 (1986-03-01), Atsumi et al.
patent: 5223751 (1993-06-01), Simmons et al.
patent: 5541546 (1996-07-01), Okumura
patent: 5576635 (1996-11-01), Partovi et al.

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