Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1995-06-07
1998-03-03
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Data refresh
36523003, 365200, 36518907, 365195, 3652257, 371 102, 371 103, G11C 700
Patent
active
057242950
ABSTRACT:
A small number of redundant circuits are freely allocable to any of a plurality of partitions or systems within an integrated circuit, such as a large dynamic random access memory (DRAM) consistent with the provision of parallel simultaneous refresh of corresponding addresses in all partitions or systems thereof. A valid address of a redundant circuit substituted for a partial address of a circuit in any partition or system is detected to disable refresh of that address in all partitions. The partition in which the substitution has been made is sensed and the disablement of refresh of all other partitions is overridden so that all partitions or systems in which a substitution has not been made may be refreshed concurrently with the substituted redundant circuit.
REFERENCES:
patent: 4811298 (1989-03-01), Helwig et al.
patent: 5243570 (1993-09-01), Saruwatari
patent: 5511028 (1996-04-01), Nam
patent: 5517450 (1996-05-01), Ohsawa
patent: 5528539 (1996-06-01), Ong et al.
Beiley Mark Adam
Drake Charles Edward
Obremski Thomas Edward
International Business Machines - Corporation
Nelms David C.
Schnurmann H. Daniel
Tran Andrew Q.
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