Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
2002-04-29
2004-11-02
Niebling, John F. (Department: 2812)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S690000, C257S692000, C257S784000, C257S787000
Reexamination Certificate
active
06812552
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to electronic packaging in general, and more particularly, to a partially patterned lead frame and a method for making and using the same. The partially patterned lead frame is stronger and more stable than conventional lead frames. The sturdiness of the partially patterned lead frame improves the process of manufacturing lead frame packages and enhances the overall reliability of the end product.
BACKGROUND OF THE INVENTION
In making electronic packages that use lead frames, there are several process steps that subject the lead frames to mechanical and thermal stresses. The finer geometries of current lead frames and the ever-increasing integration of circuits on semiconductor chips have resulted in processing that places even greater stress on the lead frames. Finely configured lead frames often resemble very delicate embroidery, or stencil-like metal structures that tend to bend, break, disfigure and deform easily. (See
FIGS. 1
a
and
1
b
). Such conventional lead frames are used in the industry to create a variety of chip packages, including wire bonded and flip-chip (FC) packages. (See
FIGS. 2
a
-
2
d
and
3
a
-
3
b
).
Conventional lead frames generally lack structural rigidity. The finger-like portions of lead frames can be quite flimsy and difficult to hold in position. This lends to handling flaws, damage and distortion in assembly processes and complicated wire bonding situations. Consequently, bond parameters have to be optimized to compensate for lead frame bouncing during the bonding process. A failure to optimize the bonding parameters to compensate for the mechanical instability of the lead frame can result in poor bond adhesion, and hence poor quality and poor reliability of the bond.
The finger-like portions of a typical lead frame extend from a central portion, known as the chip receiving area, also known as a chip-pad. The chip is usually attached to the receiving area with the backside down, and the front side is positioned face up with terminals located peripherally on the perimeter of the chip, or over the surface of the chip in the form of an array. The receiving area typically has dimensions of about 5 mm×5 mm, and the leads extending outwardly from the chip-pad area have typical dimensions of about 10 mm long×1 mm wide×0.5 mm thick. The lead frame is typically held down by a vacuum chuck and mechanical clamps. The chuck and clamps must be refitted for lead frames of different sizes and shapes. The present invention alleviates this problem.
The prior art has not shown any lead frames that can withstand the stresses encountered in current semiconductor packaging processes and that can be manufactured in a cost effective manner. The present invention achieves this objective by providing a partially patterned lead frame that not only improves the manufacturability of the lead frame itself, but also improves the integrity and reliability of the electronic packages that are formed therefrom.
SUMMARY OF THE INVENTION
The present invention provides a partially patterned lead frame for use in semiconductor packaging. The lead frame is composed of a film having a top surface and a bottom surface. A first region of the film is partially patterned from the top surface but not entirely through the film to the bottom surface. A second region of the film, not patterned from the top surface, forms a chip receiving area for supporting an integrated circuit (IC) chip and a plurality of lead contacts for providing electrical connections to the IC chip. The first region forms trenches in the film and creates a webbed structure that interconnects the second region that is not partially patterned from the top surface. The present invention is also directed to a method of manufacturing partially patterned lead frames and to electronic packages made utilizing the lead frames. The lead frame of the invention has improved structural rigidity because of its web-like, or webbed structure.
According to the invention, the top surface of a metal film, from which the lead frame is to be formed, is first patterned using standard photolithographic techniques or similar techniques to outline the areas that will correspond to a chip receiving area and leads. At the next step, etching is performed in the first region of the film outside the outlined areas from the top surface of the film partially through the thickness of the underlying film to create a lead frame pattern in the film. After the partial patterning, the remaining areas not patterned from the top surface form a second region which will serve as a chip receiving area and leads along the top surface. The first region forms a recessed webbed region below the top surface of the film. The webbed structure of the first region connects the lead portions to each other and to the chip receiving area. Thus, the partially patterned film looks similar to a webbed foot and retains its rigidity and strength so it can withstand the forces of subsequent manufacturing process steps. In particular, the partially patterned lead frame can withstand the forces encountered during wire bonding and encapsulation processes. In some embodiments, the chip receiving area and electrical leads can be formed from the same parts of the second region (e.g., in the case where the electrical leads support the integrated chip as well as provide electrical connection thereto).
The present invention also provides a unique method of making a plurality of electronic packages using partially patterned lead frames. The method involves a film having a top surface and a bottom surface. In the first region, the film is partially patterned from the top surface but not entirely through to the bottom surface. The remaining second region on the film not partially patterned from the top surface forms a plurality of partially patterned lead frames. Each of the lead frames has a chip receiving area for supporting an integrated circuit (IC) chip and a plurality of electrical leads for providing electrical connections to the IC chip.
The first region of the film forms a webbed structure that interconnects the chip receiving areas and electrical leads of each lead frame. The first region also connects the plurality of lead frames to one another in street portions of the film.
A plurality of chips is provided, each chip having a plurality of electrical terminals for attachment to a corresponding lead frame. Each chip is attached to the chip receiving area on a corresponding lead frame and an electrical connection is formed between at least one terminal of each chip and one of the electrical leads of the lead frame. Thereafter, an encapsulant material is applied over the lead frames and the street portions of the film to completely cover the top of the film. Once the encapsulant material is dried, a back patterning process is performed from the bottom surface of the film in the first region to remove the webbed structure and the street portions of the film. The encapsulant material disposed over the street portions of the film is then singulated to form individual packages.
In a preferred embodiment, the method includes forming the lead frames into the film in a matrix in a block/window pattern, and involves the production of chip scale packages.
Several advantages arise from the partially patterned lead frame of the present invention. The flat and solid un-etched bottom surface of the lead frame serves as an excellent heat sink during the wire bonding process. This provides even heat transfer for better and more consistent bond quality. Additionally, the solid structure provides a continuous surface for a universal vacuum chuck to hold the lead frame down, thereby making the chip-attachment process more stable and the leads more secure during the subsequent process steps. Awkward clamping of outer edges of the lead frame is eliminated to allow an array-matrix lead frame design and processing without conversion needs. Because the bottom side of the partially patterned lead frame is a flat continuous surface, a univ
Islam Shafidul
San Antonio Romarico Santos
Advanced Interconnect Technologies Limited
Niebling John F.
Roman Angel
White & Case LLP
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