Static information storage and retrieval – Addressing – Multiple port access
Patent
1993-06-25
1995-04-11
Fears, Terrell W.
Static information storage and retrieval
Addressing
Multiple port access
365220, 365221, 36523008, 36523009, G11C 800
Patent
active
054065275
ABSTRACT:
The dual port DRAM comprises a SAM section having a plurality of registers, for inputting and outputting data in series between a SAM input/output port and the outside in synchronism with a control signal; a RAM section having a plurality of memory cells, for inputting and outputting data at random between a RAM input/output port and the outside; a plurality of transfer gates connected between the SAM section and the RAM section, for transferring data in parallel; and a selecting section for selectively turning on or off only the transfer gates connected to the registers in the SAM section to which data are inputted from the SAM input/output port in series in synchronism with the control signal, to execute partial parallel-data transfer from the SAM section to the RAM section via the transfer gates. Therefore, in a dual port DRAM having both RAM and SAM sections, when data stored in partial areas of the RAM section are required to be rewritten, only data to be updated are transferred from the SAM section to the RAM section for partial data rewriting operation.
REFERENCES:
patent: 5134589 (1992-07-01), Hamano
patent: 5257237 (1993-10-01), Aranda et al.
patent: 5260905 (1993-11-01), Mori
Fears Terrell W.
Kabushiki Kaisha Toshiba
Niranjain F.
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