Partial write-back in read and write-back of a memory

Details Partial write-back in read and write-back of a memory Partial write-back in read and write-back of a memory

2009-03-06

2010-10-26

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Read/write circuit

C365S185220

Reexamination Certificate

active

07821843

ABSTRACT:
An integrated circuit having a functional memory and methods of operating and reducing an operating power of the integrated circuit are provided. The functional memory includes an array of memory cells connected to row and column periphery units and organized in corresponding rows and columns. The memory also includes a word line that provides row access to a memory cell. The memory further includes at least one bit line that provides column access to the memory cell. The memory still further includes a partial write-back module, connected to the at least one bit line, that establishes a bit line bias to maintain a current state of the memory cell when in a half-selected condition based on a read of the current state and during a write cycle to a selected memory cell in the array.

REFERENCES:
patent: 2004/0183808 (2004-09-01), Radke et al.
patent: 2005/0128789 (2005-06-01), Houston

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