Partial semiconductor wafer processing using wafermap display

Details Partial semiconductor wafer processing using wafermap display Partial semiconductor wafer processing using wafermap display

1999-03-04

2000-12-05

Bowers, Charles

Semiconductor device manufacturing: process

Semiconductor substrate dicing

Having specified scribe region structure

438460, 438973, 438975, 702 95, 221209, H01L 2146, H01L 2178, H01L 21301, G01C 1738, G01P 2100

Patent

active

06156625&

ABSTRACT:
Partial wafer processing is achieved by down loading the wafer map of the whole wafer from a host (2) and display the whole wafer in the die bonder monitor (3) move the wafer table to a first die pickup position (4) and move the display cursor to the first die pickup position (5) and teach two limit die coordinates in X direction (6) and teach two limit die coordinates in Y direction (7) and then using limit die coordinates as information remove other partial wafer die coordinates from the map (8) and select die pickup sequence (9).

REFERENCES:
patent: 4914601 (1990-04-01), Smyth
patent: 4972311 (1990-11-01), Holdgrafer
patent: 5355212 (1994-10-01), Wells
patent: 5362681 (1994-11-01), Roberts
patent: 5798947 (1998-08-01), Ye

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