Partial cache line write transactions in a computing system with

Details Partial cache line write transactions in a computing system with Partial cache line write transactions in a computing system with

1994-03-24

1996-12-17

Elmore, Reba I.

Boots, shoes, and leggings

395460, 395473, 395468, 3951851, 395849, 395290, 364DIG1, Q06F 1212, Q06F 1204

Patent

active

055862977

ABSTRACT:
A computing system is presented which includes a memory, an input/output adapter and a processor. The processor includes a write back cache in which dirty data may be stored. When performing a coherent write from the input/output adapter to the memory, a block of data is written from the input/output adapter to a memory location within the memory. The block of data contains less data than a full cache line in the write back cache. The write back cache is searched to determine whether the write back cache contains data for the memory location. When the search determines that the write back cache contains data for the memory location a full cache line which contains the data for the memory location is purged.

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