Parity insertion for inner architecture

Details Parity insertion for inner architecture Parity insertion for inner architecture

2011-04-26

2011-04-26

Chaudry, M. Mujtaba K (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S801000

Reexamination Certificate

active

07934143

ABSTRACT:
A coding system for digital data includes a constrained encoder module that generates encoded data based on a first constrained code, a bit insertion module that inserts at least one bit location in the encoded data, an error correcting code (ECC) encoder module that generates ECC parity bits based on the at least one bit location and the encoded data, and an inner encoding module that generates inner-code parity bits based on the encoded data and programs the inner-code parity bits into the at least one bit location.

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