Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Patent
1997-11-05
1999-12-07
Vu, Viet D.
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
39550007, 39550036, G06F 1750
Patent
active
060000384
ABSTRACT:
Integrated circuit chips (IC's) require proper placement of many cells (groups of circuit components) and complex routing of wires to connect the pins of the cells. Designing of the IC's require meeting real-world constraints such as minimization of the circuit area, minimization of wire length within the circuit, and minimization of the time the IC requires to perform its function, referred to as the IC delay. Because of the large number of cells and nets of an IC, the process of determining IC delay of an IC design requires a lot of time. The present invention discloses a method and apparatus for determining the IC delay quickly by using multiple processors and analyzing multiple pins simultaneously. Also disclosed is the method of ordering the pins to allow the application of the parallel processing technique.
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Andreev Alexander E.
Pavisic Ivan
Scepanovic Ranko
LSI Logic Corporation
Vu Viet D.
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