Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
2002-04-25
2004-08-03
Elamin, A. (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
C710S022000, C710S059000, C710S064000
Reexamination Certificate
active
06772238
ABSTRACT:
STATEMENTS REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not applicable.
REFERENCE TO A MICROFICHE APPENDIX
Not applicable.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to parallel ports associated with computer systems and with computer systems 5 containing direct memory access capabilities.
2. Description of the Related Art
Personal computer systems are becoming more powerful with each passing moment. Originally they started out with simple 8 bit microprocessors with 1 MHz clock speeds. Microprocessors have now reached capabilities where they are operating with full 32 bit wide data and have clock rates in excess of 30 MHz. Additionally, with these added capabilities the new uses for personal computers have dramatically expanded beyond those originally envisioned. Personal computer systems are now utilized both as powerful work stations performing computer automated engineering functions with high resolution graphic capabilities and as file servers for local area networks. As more sophisticated software is continually developed the capabilities of the microprocessors are stretched so that as much of the time as possible should be applied to the actual processing tasks requested by the user and as little time as possible to various background functions related to controlling the computer system.
Printing with a personal computer compatible with those developed by International Business Machines Corporation (IBM) is done either over an asynchronous serial communications interface or over a parallel interface, commonly referred to as a Centronics type interface. The parallel interface is generally preferred because higher data throughputs are generally available, which decreases actual printer communication time. The parallel port is an 8 bit wide data port with a clocking or strobe signal and various feedback signals indicating data acknowledgement and device busy, as well as printer status signals such as paper out and printer error. This is a relatively simple and straightforward interface and in fact personal computers built according to the standard developed by IBM for its PC and PC/XT may utilize up to three such ports, referred to as LPT1, LPT2 and LPT3 under the MS-DOS environment.
In the past the microprocessor in the personal computer has been required to directly control the parallel port for each individual byte of data being transferred from the computer system to the printer. This resulted in lost computational time in most cases. To transfer a byte of data over the parallel port, the microprocessor first checks the status port for errors and a not busy state. If there are no errors and the printer is not busy, the microprocessor writes the data to the data port. The microprocessor then writes to the status port to set the data strobe signal. The microprocessor then writes to the status port to clear the data strobe signal. This is the minimum number of steps required for each byte of data. If the microprocessor is operating the print task in foreground mode, where the only task it is operating is the printer function and the entire resource of the personal computer is dedicated to monitoring the parallel port, this loop is acceptable, with additional steps needed only to advance in the data file. However, all other user tasks in the processor are on hold until printing is completed. Thus the entire computer is dedicated to the simple task of printing. If however, the printing function is assigned as a background task, then each time a byte must be transferred from the computer system to the printer, an interrupt handling operation must occur. An interrupt occurs, the microprocessor must branch to the printing code described above, the byte is transferred and the microprocessor returns from the interrupt. Now two tasks can be performed basically simultaneously by the microprocessor but even more overhead is added to the print task and relatively large time slices are removed from the foreground task, decreasing the efficiency of both tasks. As can be seen there are a great deal of processor resources involved in transferring each particular byte. This reduces the available microprocessor resources for use by computer programs requested by the user and thus overall system capabilities.
Also present in current personal computer systems is a direct memory access controller. A direct memory access (DMA) controller allows information to be transferred between memory and input/output (I/O) ports without the interaction of the microprocessor. Thus the use of a DMA controller allows the computer system to perform certain functions without requiring an interrupt or dedication of the microprocessor, thus improving computer system capabilities and efficiency. The DMA controller starts an operation after being set up by the microprocessor and then handles the passing of data between the memory and I/O port until the operation is complete, at which time an interrupt is generated by the peripheral device operating in the I/O port space to inform the microprocessor that the operation is complete.
However, this DMA process has never been assigned to the parallel port in personal computers, thus requiring the above mentioned overhead for the printing of each particular byte of data. This overhead can become quite burdensome when large print queues are developed, as when the personal computer is operating as a file server and thus must handle the high throughput requirements of the file server itself as well as developing printing queues and printing tasks for a large number of users.
BRIEF SUMMARY OF THE INVENTION
The present invention provides the circuitry necessary to interface the DMA controller with the parallel port to allow printing operations to occur without microprocessor intervention once the DMA controller is programmed. The circuitry includes the necessary logic to develop the DMA request and the interrupt signals used to interface with the DMA controller and the microprocessor and produces the strobe signal provided to the printer to indicate to the printer that data is available. The circuitry recognizes the acknowledge, busy, paper out, select and error signals received from the printer and, in combination with the timing signals received from the DMA controller, produces the necessary output signals to transfer data from memory to the printer. Further, the circuitry preferably includes the data register necessary to store the data which is transferred by the DMA controller from the memory to the I/O port addressed for the particular printer. The circuitry controls the output of the data register to enable the data onto the parallel lines to the printer at the appropriate time when the strobe signal is being presented.
A state machine is used to clock the logic through various states depending upon the present state and given conditions and, with associated combinatorial logic, produces the necessary output signals to inform the printer that it has new data to acknowledge, to inform the DMA controller that another byte of data is requested and to indicate to the microprocessor by means of an interrupt line that either the task is completed or errors have occurred.
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patent
Elamin A.
Hewlett--Packard Development Company, L.P.
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