Parallel module testing

Details Parallel module testing Parallel module testing

1988-12-07

1991-04-02

Smith, Jerry

Excavating

371 151, G06F 1100

Patent

active

050051733

ABSTRACT:
An integrated circuit (10) includes at least one module (12) of operation circuits and also has other operation circuitry. The module (10) has a plurality of operation circuit terminals (98) each of which is operable to be selectively coupled to an external operation circuit terminal (86) or to a respective test terminal (96) by a multiplexer (76). A plurality of peripheral cells (30-40) are provided for connection to conductors external to the chip (10). Each cell (30-40) is bidirectionally coupled to a respective test terminal (42) and is undirectionally coupled to operation circuitry (134, 142, 158, 160) of the chip (10) such that test patterns of a testing program corresponding to the module (12) may be input into selected ones of the cells (30-40). Resulting output signals may be obtained from selected ones of the cells (30-40) that will be unaffected by operation circuitry on the integrated circuit chip exterior to the module (12).

REFERENCES:
patent: 4180203 (1979-12-01), Masters
patent: 4602210 (1986-07-01), Fasang
patent: 4710931 (1987-12-01), Bellay
patent: 4799004 (1989-01-01), Mori
patent: 4821269 (1989-04-01), Jackson

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