Parallel link electrical and timing parameter specification...

Details Parallel link electrical and timing parameter specification... Parallel link electrical and timing parameter specification...

2011-04-19

2011-04-19

Peyton, Tammara (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output process timing

C710S001000, C710S106000, C714S043000, C714S724000, C714S025000, C326S030000, C326S032000, C330S285000, C330S295000

Reexamination Certificate

active

07930452

ABSTRACT:
In one embodiment, an apparatus includes a driver and a receiver. The driver has an output, wherein the output of the driver has an associated output termination. In addition, the receiver has an input, wherein the input of the receiver has an associated input termination. An interface between the output of the driver and the input of the receiver operates according to a set of one or more timing parameters, wherein the input termination, the output termination, and the set of timing parameters correspond to a bandwidth for data transfer or frequency for data transfer across the interface between the output of the driver and the input of the receiver.

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JEDEC Standard, Bus Interconnect Logic (BIC) for 1.2 Volts, JESD8-16A (Revision of JESD8-16), JEDEC Solid State Technology Association, Nov. 2004.

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