Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1998-07-31
2001-10-02
Moise, Emmanuel L. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S755000, C714S757000
Reexamination Certificate
active
06298463
ABSTRACT:
This invention relates to coding using parallel concatenated convolutional codes or PCCCs, also known as turbo codes. Such codes can be used in various communications systems, especially for CDMA (code division multiple access) communications which are increasingly being used in cellular wireless communications systems. The term coding is used herein to embrace methods and apparatus for both encoding and decoding, with or without modulation and demodulation of coded signals.
BACKGROUND
PCCCs or turbo codes are known for example from an article by C. Berrou et al. entitled “Near Shannon Limit Error-Correcting Coding And Decoding: Turbo-Codes”, Proceedings of the IEEE International Conference on Communications, 1993, pages 1064-1070. That article showed that a turbo code together with an iterative decoding algorithm could provide performance in terms of BER (Bit Error Rate) that is close to the theoretical limit. A turbo code encoder provides a parallel concatenation of two (or more) RSC (Recursive Systematic Convolutional) codes which are typically, but not necessarily, identical, applied to an input bit sequence and an interleaved version of this input bit sequence. The output of the encoder comprises systematic bits (the input bit sequence itself) and parity bits which can be “punctured” (selected) to provide a desired rate of encoding.
Various schemes are being proposed and developed to provide, especially for the communication of data in a CDMA communications system, a greater bandwidth (signal transmission rate) than is provided in a so-called IS-95 system which is compatible with TIA/EIA (Telecommunications Industry Association/Electronic Industries Association) Interim Standard IS-95-A, “Mobile Station-Base Station Compatibility Standard for Dual-Mode Wideband Spread Spectrum Cellular System”. Turbo coding has been proposed for such WCDMA (wideband CDMA) systems.
While coding using PCCCs or turbo codes can provide substantial advantages, there remains a need to provide an optimum coding for the best possible performance in respect of a variety of factors such as BER, spectral efficiency, and decoder complexity.
An object of this invention is to provide improved encoding and decoding methods and apparatus using PCCCs.
SUMMARY OF THE INVENTION
One aspect of this invention provides a parallel concatenated convolutional code (PCCC) encoder in which information bits are supplied to a first convolutional code encoder for producing first parity bits and via an interleaver to a second convolutional code encoder for producing second parity bits, wherein the interleaver interleaves the information bits in groups each of N bits, where N is an integer greater than one.
In preferred embodiments of the invention, N=2 or 3.
The encoder can also include a parity bit generator supplied with the information bits for generating additional parity bits, wherein the additional parity bits are supplied with the information bits to at least one of the first convolutional code encoder and the interleaver.
Another aspect of the invention provides a parallel concatenated convolutional code (PCCC) encoder comprising: a parity bit generator responsive to information bits supplied to an input of the encoder for generating parity bits; an interleaver responsive the information bits and the parity bits for interleaving the information and parity bits in groups each of N bits, where N is an integer greater than one; a first convolutional code encoder responsive to at least the information bits for producing first output parity bits; a second convolutional code encoder responsive to interleaved information and parity bits produced by the interleaver, to produce second output parity bits; and means for deriving an output of the PCCC encoder from the information bits and at least some of the first and second output parity bits.
Preferably the first convolutional code encoder is also responsive to the parity bits produced by the parity bit generator. In a particular form of the encoder, the parity bit generator generates one of said parity bits for every two information bits, and N=3.
A further aspect of the invention provides a method of encoding comprising the steps of supplying information bits directly as systematic bits, via a first convolutional code encoder to produce first parity bits, and via an interleaver and a second convolutional code encoder to produce second parity bits, to encoder outputs, wherein the interleaver interleaves the information bits in groups each of N bits, where N is an integer greater than one.
The invention also provides a parallel concatenated convolutional code (PCCC) decoder comprising two constituent decoders coupled together via at least one interleaver and at least one deinterleaver complementary to the interleaver for iteratively decoding systematic and parity information produced by a PCCC encoder, wherein the interleaver and deinterleaver operate to interleave and deinterleave information in groups each representing N bits, where N is an integer greater than one.
In addition, the invention provides a method of decoding information encoded by the method recited above, comprising iteratively decoding in first and second decoders information representing the systematic bits using information representing the first and second parity bits respectively and iterative decoding information coupled from the first decoder to the second decoder via an interleaver and from the second decoder to the first decoder via a deinterleaver complementary to the interleaver, wherein the interleaver interleaves the information in groups each representing N bits, where N is an integer greater than one.
REFERENCES:
patent: 4559625 (1985-12-01), Berlekamp et al.
patent: 5721745 (1998-02-01), Hladik et al.
patent: 5983384 (1999-11-01), Ross
patent: 5996104 (1999-11-01), Herzberg
A. Khandani, Group Structured of Turbo-codes with Application to the Interleaver Design, IEEE, Aug. 1998.*
“Near Shannon Limit Error-Correcting coding and Decoding: Turbo-Codes”, C.Berrou et al., Proceedings of the IEEE International Conference on Communications, 1993, pp. 1064-1070.
Bingeman Mark
Khaleghi Farideh
Khandani Amir Keyvan
Moise Emmanuel L.
Nortel Networks Limited
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