Multiplex communications – Wide area network – Packet switching
Patent
1994-01-14
1995-02-14
Richardson, Robert L.
Multiplex communications
Wide area network
Packet switching
370 60, 370 941, 36424294, 364284, 364DIG1, G06F 1300
Patent
active
053902980
ABSTRACT:
A computer including a processor array and a routing network. Processors in the processor array generate messages for transfer to over the routing network, each message including a path identifier portion identifying a path from a source, message processor to a destination processor. The routing network comprises a plurality of interconnected router nodes, at least some of said router nodes being connected to the processors to receive messages therefrom and transmit messages thereto. Each router node operates in a plurality of modes. In a first mode, the router nodes couple received messages to a router node connected thereto in accordance with the path identifier portion to thereby transfer each respective message along the path identified in its path identifier portion. In a second mode, the router node couple received messages to predetermined ones of the router nodes or processors connected thereto, the predetermined ones of said router nodes or processors being selected to facilitate transfer of a message to a nearby processor to facilitate the rapid emptying of the routing network of messages. A control element controls the router nodes to enable them to operate in the first mode or second mode generally contemporaneously.
REFERENCES:
patent: 5101480 (1992-03-01), Shin et al.
Feynman Carl R.
Hillis W. Daniel
Kuszmaul Bradley C.
Leiserson Charles E.
Spiller Cynthia J.
Jordan Richard A.
Richardson Robert L.
Thinking Machines Corporation
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