Parallel calculation of exponent and sticky bit during normaliza

Details Parallel calculation of exponent and sticky bit during normaliza Parallel calculation of exponent and sticky bit during normaliza

1995-03-31

1998-05-26

Mai, Tan V.

Boots, shoes, and leggings

364748, G06F 700, G06F 738

Patent

active

057576823

ABSTRACT:
A system implementing a methodology for determining the exponent in parallel with determining the fractional shift during normalization according to partitioning the exponent into partial exponent groups according to the fractional shift data flow, determining all possible partial exponent values for each partial exponent group according to the fractional data flow, and providing the exponent by selectively combining possible partial exponents from each partial exponent group according to the fractional data flow. There is also provided a system implementing a methodology for generating the sticky bit during normalization. Sticky bit information is precalculated and multiplexed according to the fractional dataflow. In an embodiment of the invention, group sticky signals are calculated in tree form, each group sticky having a number of possible sticky bits corresponding to the shift increment amount of the multiplexing. The group sticky bits are further multiplexed according to subsequent shift amounts in the fractional dataflow to provide an output sticky bit at substantially the same time as when the final fractional shift amount is available, and thereby at substantially the same time as the normalized fraction.

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