Parallel architecture computer system and method

Details Parallel architecture computer system and method Parallel architecture computer system and method

1996-07-15

1998-09-08

Sheikh, Ayaz R.

395299, G06F 1300

Patent

active

058058354

ABSTRACT:
A computer system, method, and controller bus agent for control access to a computer bus. The computer system includes a parallel architecture in which plural bus agents are directly coupled to the computer bus. Each bus agent includes plural bus requester ports each coupled to a different bus requester. As such, the computer system employs a relatively flat, parallel architecture that handles bus requests from the bus requesters in parallel. The controller bus agent includes an internal arbiter and an external arbiter. The internal arbiter arbitrates between bus requests received from the plural bus requesters coupled to the controller bus agent. The external arbiter arbitrates between the bus requests received from other bus agents and from the internal arbiter.

REFERENCES:
patent: 4912633 (1990-03-01), Schweizer et al.
patent: 5280591 (1994-01-01), Garcia et al.
patent: 5396602 (1995-03-01), Amini et al.
patent: 5404538 (1995-04-01), Kyappweis, Sr.
patent: 5515516 (1996-05-01), Fisch et al.
patent: 5581782 (1996-12-01), Sarangdlar et al.
patent: 5594882 (1997-01-01), Bell
patent: 5619661 (1997-04-01), Crens et al.
M. Morris Mano, Computer System Architecture (Second Edition), Prentice-Hall, Inc. 1982 pp. 406-415 and pp. 454-462.

Affiliated with

Also associated with

Rating

Parallel architecture computer system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Parallel architecture computer system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallel architecture computer system and method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1293261