Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Patent
1997-05-09
2000-07-04
Cabeca, John W.
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
711127, 711211, 711217, 711219, G06F 1200
Patent
active
060852801
ABSTRACT:
A parallel type of memory is divided into P sub-arrays with which there are associated column and row decoding circuits and read circuits. Circuits are used to produce and give P addresses simultaneously to the decoding circuits on the basis of a given address so as to enable the simultaneous reading of P words from a single address. Circuits receive the P information elements extracted from the P words and give them in series at an output port at a frequency greater than the reading frequency. Thus the access time to the information elements seen from the exterior of the memory is reduced.
REFERENCES:
patent: 4866603 (1989-09-01), Chiba
patent: 4987559 (1991-01-01), Miyauchi et al.
patent: 5016226 (1991-05-01), Hiwada et al.
patent: 5093805 (1992-03-01), Singh
patent: 5285421 (1994-02-01), Young et al.
patent: 5295252 (1994-03-01), Torii et al.
patent: 5544351 (1996-08-01), Lee et al.
patent: 5610864 (1997-03-01), Manning
patent: 5663922 (1997-09-01), Tailliet
patent: 5754815 (1998-05-01), Ernst et al.
patent: 5761714 (1998-06-01), Liu et al.
patent: 5761732 (1998-06-01), Shaberman et al.
French Search Report from French application No. 96 06123, filed May 10, 1996.
Patent Abstracts of Japan, vol. 8, No. 214, Sep. 29, 1984 & JP-A-59 098363, Hiroaki.
Patent Abstracts of Japan, vol. 5, No. 42, Mar. 20, 1981 & JP-A-55 163677, Katsuro.
Patent Abstracts of Japan, vol. 5, No. 26, Feb. 17, 1981 & JP-A-55 150178, Masayuki.
Patent Abstracts of Japan, vo. 11, No. 328, Oct. 27, 1987 & JP-A-62 112292, Keiichi.
Cabeca John W.
Moazzami Nasser
SGS-Thomson Microelectronics S.A.
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