Page stream sorter for poor locality access patterns

Details Page stream sorter for poor locality access patterns Page stream sorter for poor locality access patterns

2006-11-03

2010-02-16

Thai, Tuan V (Department: 2185)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

C711S154000, C711S158000, C711S165000

Reexamination Certificate

active

07664905

ABSTRACT:
In some applications, such as video motion compression processing for example, a request pattern or “stream” of requests for accesses to memory (e.g., DRAM) may have, over a large number of requests, a relatively small number of requests to the same page. Due to the small number of requests to the same page, conventionally sorting to aggregate page hits may not be very effective. Reordering the stream can be used to “bury” or “hide” much of the necessary precharge/activate time, which can have a highly positive impact on overall throughput. For example, separating accesses to different rows of the same bank by at least a predetermined number of clocks can effectively hide the overhead involved in precharging/activating the rows.

REFERENCES:
patent: 4477736 (1984-10-01), Onishi
patent: 2003/0065897 (2003-04-01), Sadowsky et al.
patent: 2007/0156946 (2007-07-01), Lakshmanamurthy et al.

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