Page buffer circuit, nonvolatile device including the same,...

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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Details

C365S205000, C365S206000, C365S207000

Reexamination Certificate

active

07903481

ABSTRACT:
A page buffer circuit comprises a sense unit, a latch unit, and a bit line voltage control unit. The sense unit is configured to couple a bit line and a sense node in response to a sense control signal in response to the sense control signal. The latch unit includes a plurality of latch circuits configured to latch data programmed or to be programmed. The bit line voltage control unit is configured to classify program states of memory cells, coupled to the selected bit line, into first to nthgroups by performing first to nthverification operations after a first program operation of a program operation and is configured to control a voltage level of the sense control signal in order to transfer a bit line voltage to the selected bit line.

REFERENCES:
patent: 7061813 (2006-06-01), Lee
patent: 7313028 (2007-12-01), Ju
patent: 7362630 (2008-04-01), Mori et al.
patent: 1020090058464 (2009-06-01), None
Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Jun. 28, 2010.

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