Page-buffer and non-volatile semiconductor memory including...

Details Page-buffer and non-volatile semiconductor memory including... Page-buffer and non-volatile semiconductor memory including...

2008-05-27

2008-05-27

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S189050, C365S185220, C365S204000

Reexamination Certificate

active

07379333

ABSTRACT:
In one aspect, a non-volatile memory device is provided which is operable in a programming mode and a read mode. The memory device includes a memory cell array which includes a plurality of non-volatile memory cells, a plurality of word lines, and a plurality of bit lines. The memory device further includes an internal data output line for outputting data read from the bit lines of the memory array, and a page buffer operatively connected between a bit line of the memory cell array and the internal data output line. The page buffer includes a sense node which is selectively connected to the bit line, a latch circuit having a latch node which is selectively connected to the sense node, a latch input path which sets a logic voltage of the latch node in the programming mode and the read mode, and a latch output path which is separate from the latch input path and which sets as logic voltage of the internal date output line according to the logic voltage of the latch node.

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