Padless substrate carrier

Abrading – Abrading process – Glass or stone abrading

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C451S285000, C451S286000, C451S289000, C451S388000

Reexamination Certificate

active

06276998

ABSTRACT:

TECHNICAL FIELD
The present invention relates to the field of polishing of substrates and particularly the polishing of substrates by chemical mechanical polishing processes. Particularly, the present invention is directed toward improvement in a substrate carrier to be used to polish substrates and methods of polishing with the improved substrate carrier.
BACKGROUND ART
As part of the manufacturing process of semiconductor devices, semiconductor wafers are increasingly being polished by CMP. The uniform removal of material from and the planarity of patterned and un-patterned wafers is critical to wafer process yield. Generally, the wafer to be polished is mounted on a substrate carrier which holds the wafer using a combination of vacuum suction or other means and, most often, a wafer backing pad to contact the rear side of the wafer. A retaining lip or ring is generally provided around the edge of the wafer to keep the wafer contained under the substrate carrier. The front side of the wafer, the side to be polished, is then contacted with an abrasive material such as an abrasive pad or abrasive strip. The abrasive pad or strip may have free abrasive fluid sprayed on it, may have abrasive particles affixed to it, or may have abrasive particles sprinkled on it.
The ideal wafer polishing process can be described by Preston's equation:
R=K
p
*P*V,
where R is the removal rate; Kp is a function of consumables (abrasive pad roughness and elasticity, surface chemistry and abrasion effects, and contact area); P is the applied pressure between the wafer and the abrasive pad; and V is the relative velocity between the wafer and the abrasive pad. As a result, the ideal CMP process should have constant cutting velocity over the entire wafer surface, constant pressure between the abrasive pad and wafer, and constant abrasive pad roughness, elasticity, area and abrasion effects. In addition, control over the temperature and pH is critical and the direction of the relative pad/wafer velocity should be randomly distributed over the entire wafer surface.
One common type of wafer polishing apparatus is the CMP model 372M made by Westech Systems Inc. A wafer is held by a substrate carrier of the model 372M. The substrate carrier rotates about the axis of the wafer. A large circular abrasive pad is rotated while contacting the rotating wafer and substrate carrier. The rotating wafer contacts the larger rotating abrasive pad in an area away from the center of the abrasive pad.
Another related apparatus is a polishing machine for polishing semiconductor wafers containing magnetic read-write heads, disclosed in U.S. Pat. No. 5,335,453 to Baldy et al. With this machine, a semiconductor wafer is held by a substrate carrier which is moved in a circular translatory motion by an eccentric arm. The wafer is polished by contacting an abrasive strip which is advanced in one direction. The relative motion between the wafer and the abrasive strip is a combination of the circular motion of the wafer and the linear motion of the advancing abrasive strip. Connected to the eccentric arm is a support head that includes a rigid part and a “flexible disk” made from a “flexible material” having a “certain thickness”. The wafer
44
to be polished is described as being “partly embedded in the disk
142
during polishing by the effect of the force exerted on the support head”.
The gimbal point of a CMP substrate carrier is a critical element of the polishing process. The substrate carrier must align itself to the polish surface precisely to insure uniform, planar polishing results. Many CMP substrate carriers currently available yield wafers having anomalies in planarity. The vertical height of the pivot point above the polishing surface is also important, since the greater the height, the larger the moment that is induced about the pivot point during polishing. Two pervasive problems that exist in most CMP wafer polishing apparatuses are underpolishing of the center of the wafer, and the inability to adjust the control of wafer edge exclusion as process variables change.
For example, substrate carriers used on many available CMP machines experience a phenomenon known in the art as “nose diving”. During polishing, the head reacts to the polishing forces in a manner that creates a sizable moment, which is directly influenced by the height of the gimbal point, mentioned above. This moment causes a pressure differential along the direction of motion of the head. The result of the pressure differential is the formation of a standing wave of the chemical slurry that interfaces the wafer and the abrasive surface. This causes the edge of the wafer which is at the leading edge of the substrate carrier, to become polished faster and to a greater degree than the center of the wafer.
The removal of material on the wafer is related to the chemical action of the slurry. As slurry is inducted between the wafer and the abrasive pad and reacts, the chemicals responsible for removal of the wafer material gradually become exhausted. Thus, the removal of wafer material further from the leading edge of the substrate carrier (i.e., the center of the wafer) experiences a diminished rate of chemical removal when compared with the chemical action at the leading edge of the substrate carrier (i.e., the edge of the wafer), due to the diminished activity of the chemicals in the slurry when it reaches the center of the wafer. This phenomenon is sometimes referred to as “slurry starvation”.
Apart from attempts to reshape the crown of the substrate carrier, other attempts have been made to improve the aforementioned problem concerning “nose diving”. In a prior art substrate carrier that gimbals through a single bearing at the top of the substrate carrier, sizable moments are generated because the effective gimbal point of the substrate carrier exists at a significant, non-zero distance from the surface of the polishing pad. Thus, the frictional forces, acting at the surface of the polishing pad, act through this distance to create the undesirable moments.
U.S. Pat. No. 5,377,451 to Leoni et al. describes a wafer carrier that “projects” the effective gimbal point down to the surface of the polishing pad, thereby eliminating the moment arm through which the frictional forces create the undesirable “nose diving”. Leoni et al. produce this effect by instituting a conical bearing assembly which allows the projection of a “universal pivot point” to a point that is located at or near the surface of the polishing surface. The solution proposed by Leoni et al., however, requires the use of a number of bearings in the assembly in order to effect this projection, thereby increasing the cost of the wafer carrier. Additionally, there is still a moment produced because of the actual contact points at the bearings. There is also a substantial risk that, due to inexact manufacturing, the projected pivot point will not lie exactly on the contact surface of the carrier, which will also introduce moments.
FIG. 17
shows a prior art carrier design
900
which transfers the polishing load from a bellows
910
to a guided shaft
920
into a gimbal
930
(shown in phantom to illustrate the gimbal point
933
and outward into a carrier plate
940
. If the gimbal mechanism is not free, stiction will prevent the gimbal
930
from its intended free and smooth movement and the guided shaft
920
will begin to over-constrain the system during polishing.
Additionally, it is not uncommon for loads in this type of a system to become excessive enough to cause plastic deformation of the gimbal. Because of the offset rotation points of the gimbal
930
and the ring flexure
950
, the dynamics of such a carrier assembly can become unstable during a high friction polishing operation.
A semiconductor wafer polishing apparatus by Banks in U.S. Pat. No. 4,373,991, uses a plurality of channels
27
to inject pressurized water, preferably slightly greater than 15 psi, between a plate and a wafer to allow free floating of the wafer. However, the carrier of Banks uses a conventi

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Padless substrate carrier does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Padless substrate carrier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Padless substrate carrier will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2472611

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.