Paddleless molded plastic semiconductor chip package

Details Paddleless molded plastic semiconductor chip package Paddleless molded plastic semiconductor chip package

1996-10-11

1998-07-07

Picardat, Kevin

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

438121, H01L 2160

Patent

active

057768005

ABSTRACT:
Disclosed is a semiconductor package and method in which a semiconductor chip is mounted within the opening of a lead frame by bonding wires extending between the active front side of the chip and bonding pads of the lead frame, and the lead frame/chip assembly is encased within a plastic molded body, with the inactive back side of the chip exposed and facing outside the package.

REFERENCES:
patent: 5101324 (1992-03-01), Sato
patent: 5130889 (1992-07-01), Hamburgen et al.
patent: 5309026 (1994-05-01), Matsumoto
patent: 5394298 (1995-02-01), Sagisaka
patent: 5474958 (1995-12-01), Djennas et al.
Tanaka et al, "Thermal Analysis of Plastic QFP with High Thermal Dissipation", 1992 IEEE ECTC, pp. 332-339.
Djennas et al, "A Novel, Lower Cost, Thermally Enhanced Exposed Silicon Plastic Package (ESPP)", 1994, IEEE ECTC, pp. 67-74.
Nakamura et al, "Effects of Mechanical and Flow Properties of Encapsulating Resin of the Performance of Ultra Thin Carrier Package", 1993, IEEE ECTC, pp. 419-424.
Joiner et al, "Low Cost, Thermally Enhanced QFP", 1993, IEPC, pp. 471-478.

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