Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2007-11-19
2010-10-12
Tan, Vibol (Department: 2819)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S774000, C326S040000
Reexamination Certificate
active
07812458
ABSTRACT:
A three dimensional semiconductor device, comprising: a plurality of circuit blocks including programmable logic blocks having predetermined positions within the device; a plurality of pads having predetermined positions within the device; and a configuration memory circuit coupled to the programmable logic blocks having a plurality of fabricating methods without altering the predetermined positions of the pads and the circuit blocks.
REFERENCES:
patent: 4609986 (1986-09-01), Hartmann et al.
patent: 4706216 (1987-11-01), Carter
patent: 4761768 (1988-08-01), Turner et al.
patent: 4864161 (1989-09-01), Norman et al.
patent: 4870302 (1989-09-01), Freeman
patent: 4873459 (1989-10-01), El Gamal et al.
patent: 5164612 (1992-11-01), Kaplinsky
patent: 5191241 (1993-03-01), McCollum et al.
patent: 5216636 (1993-06-01), Runaldue
patent: 5343406 (1994-08-01), Freeman et al.
patent: 5347519 (1994-09-01), Cooke et al.
patent: 5488316 (1996-01-01), Freeman et al.
patent: 5563526 (1996-10-01), Hastings et al.
patent: 5581501 (1996-12-01), Sansbury et al.
patent: 5612631 (1997-03-01), Agrawal et al.
patent: 5625221 (1997-04-01), Kim et al.
patent: 5679967 (1997-10-01), Janai et al.
patent: 5684744 (1997-11-01), Orgill et al.
patent: 5701233 (1997-12-01), Carson et al.
patent: 5781031 (1998-07-01), Bertin
patent: 5793115 (1998-08-01), Zavracky et al.
patent: 5835405 (1998-11-01), Tsui et al.
patent: 5844422 (1998-12-01), Trimberger et al.
patent: 5880598 (1999-03-01), Duong
patent: 5943574 (1999-08-01), Tehrani et al.
patent: 5949710 (1999-09-01), Pass et al.
patent: 5949719 (1999-09-01), Clinton et al.
patent: 6005806 (1999-12-01), Madurawe et al.
patent: 6018476 (2000-01-01), Madurawe et al.
patent: 6097211 (2000-08-01), Couts-Martin et al.
patent: 6134171 (2000-10-01), Yamagata et al.
patent: 6134173 (2000-10-01), Cliff et al.
patent: 6191614 (2001-02-01), Schultz et al.
patent: 6242767 (2001-06-01), How et al.
patent: 6259271 (2001-07-01), Couts-Martin et al.
patent: 6262596 (2001-07-01), Schultz et al.
patent: 6275064 (2001-08-01), Agrawal et al.
patent: 6275065 (2001-08-01), Mendel
patent: 6331784 (2001-12-01), Mason et al.
patent: 6331789 (2001-12-01), Or-Bach
patent: 6337579 (2002-01-01), Mochida
patent: 6340830 (2002-01-01), Takemura
patent: 6353562 (2002-03-01), Bohm et al.
patent: 6420925 (2002-07-01), Fifield et al.
patent: 6448808 (2002-09-01), Young et al.
patent: 6480027 (2002-11-01), Ngai et al.
patent: 6496887 (2002-12-01), Plants
patent: 6504742 (2003-01-01), Tran et al.
patent: 6515511 (2003-02-01), Sugibayashi et al.
patent: 6525953 (2003-02-01), Johnson
patent: 6551857 (2003-04-01), Leedy
patent: 6582980 (2003-06-01), Feldman et al.
patent: 6613611 (2003-09-01), How et al.
patent: 6614259 (2003-09-01), Couts-Martin et al.
patent: 6627985 (2003-09-01), Huppenthal et al.
patent: 6737675 (2004-05-01), Patel et al.
patent: 6738962 (2004-05-01), Flaherty et al.
patent: 6798240 (2004-09-01), Pedersen
patent: 6812731 (2004-11-01), Trimberger
patent: 6911730 (2005-06-01), New
patent: 6946330 (2005-09-01), Yamazaki et al.
patent: 6954084 (2005-10-01), Islam
patent: 6992503 (2006-01-01), Madurawe
patent: 6998722 (2006-02-01), Madurawe
patent: 7019557 (2006-03-01), Madurawe
patent: 7030651 (2006-04-01), Madurawe
patent: 7064018 (2006-06-01), Madurawe
patent: 7064579 (2006-06-01), Madurawe
patent: 7084666 (2006-08-01), Madurawe
patent: 7112994 (2006-09-01), Madurawe
patent: 7176713 (2007-02-01), Madurawe
patent: 7253659 (2007-08-01), Madurawe
patent: 7268580 (2007-09-01), Madurawe
patent: 2001/0003428 (2001-06-01), Or-Bach
patent: 2001/0028059 (2001-10-01), Emma et al.
patent: 2001/0047509 (2001-11-01), Mason et al.
patent: 2002/0177260 (2002-11-01), Matsumoto
patent: 2002/0186044 (2002-12-01), Agrawal et al.
patent: 2003/0001615 (2003-01-01), Sueyoshi et al.
patent: 2003/0023762 (2003-01-01), Dhir et al.
patent: 2003/0085733 (2003-05-01), Pugh et al.
patent: 2003/0227056 (2003-12-01), Wang et al.
patent: 2004/0178819 (2004-09-01), New
patent: 2005/0023656 (2005-02-01), Leedy
patent: 2006/0195729 (2006-08-01), Huppenthal
patent: 2006/0225020 (2006-10-01), Chandrakasan et al.
patent: 2009/0146189 (2009-06-01), Madurawe
Ashok K. Sharma, “Programmable Logic Handbook—PLDs, CPLDs, & FPGAs”, 1998, pp. 99-171, McGraw-Hill, USA.
Alexander, et al., “Three-Dimensional Field-Programmable Gate Arrays”, Proceedings of the 8thAnnual IEEE International ASIC Conference and Exhibit, 1995, pp. 253-256.
Chen Dong et al., “3-D nFPGA: A reconfigurable architecture for 3-D CMOS/Nanomaterial Hybrid Digital Circuits”, IEEE Trans. Circuits and Systems, vol. 54, No. 11, Nov. 1, 2007 (pp. 2489-2501).
Tan Vibol
Tier Logic, Inc.
Tran & Associates
LandOfFree
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