Pad etch process capable of thick titanium nitride arc removal

Details Pad etch process capable of thick titanium nitride arc removal Pad etch process capable of thick titanium nitride arc removal

1999-08-31

2001-01-23

Powell, William (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S612000, C438S724000, C438S757000

Reexamination Certificate

active

06177355

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to integrated circuits and to methods of manufacturing integrated circuits. More particularly, the present invention relates to a pad etch process with thick titanium nitride (TiN) anti-reflective coating (arc) removal.
BACKGROUND OF THE INVENTION
Integrated circuits (ICs), such as, ultra-large scale integrated (ULSI) circuits, can include as many as one million transistors or more. The ULSI circuit can include complementary metal oxide semiconductor (CMOS) field effect transistors (FETS). The transistors can include semiconductor gate structures disposed between drain and source regions. The drain and source regions are typically heavily doped with a P-type dopant (boron) or an N-type dopant (phosphorous).
Structures of metal or other conductive materials can be included in ICs to interconnect transistors or make connections to transistors from other devices. For example, an IC can include several layers (metal
1
, metal
2
, etc.) of conductive lines, each being a composition of several metal materials. The conductive lines are insulated from each other by interlevel dielectric layers (ILD
1
, ILD
2
, etc). The last (uppermost) layer of conductive lines is covered by a final insulating material. In the fabrication process, this last conductive layer, or “topside stack”, must be exposed at specific sites to make appropriate connections to the IC (a pad etch). Generally, the final insulating material is etched to expose portions of the top surface of the layer, or “pad”, of the topside stack.
The conductive lines may be covered with a titanium nitride (TiN) anti-reflective coating (arc). A TiN arc on top of the conductive lines serves two purposes: 1) as an anti-reflective coating for lithography and 2) as a via etch stop. The final metal layer (the topside stack) typically is coated with thinner TiN since it only has to serve as an anti-reflective coating, not an etch stop. A thinner TiN is beneficial on the final metal layer because during a pad etch all of the TiN must be removed to ensure high quality bonding. In some instances, a thick TiN layer is necessary during pad etch for other reasons (e.g., yield issues, non-standard flows, pad opens for sample wafer electrical test during a process flow). With thicker TiN, it is necessary to remove additional TiN for high quality bonding.
One prior method of removing thick TiN is using increased temperature during the etching process. The TiN etch rate is a strong function of temperature. Allowing the wafer to reach temperatures greater than approximately 110° C. will accelerate the TiN etch rate. However, using such temperatures can damage the photoresist, making the photoresist very difficult to remove.
Thus, there is a need for a pad etch process for removing thick TiN under the topside stack. Further, there is a need for removing TiN at a much higher rate. Even further, there is a need for stabilizing the photoresist such that the photoresist can withstand elevated temperatures.
SUMMARY OF THE INVENTION
One embodiment of the present invention relates to a method of pad etching which removes an anti-reflective coating over a conductor in an integrated circuit. The method includes providing a mask layer, stabilizing the mask layer to high temperature, and providing a high temperature etch to remove the anti-reflective coating.
Another embodiment of the present invention relates to a method of removing an anti-reflective coating layer disposed over a stack structure under a topside stack. The method includes providing a photoresist layer including an aperture, stabilizing the photoresist layer to high temperature, and etching a hole below the aperture in the photoresist layer. The photoresist layer is located over a portion of an insulating layer disposed over the anti-reflective coating and the stack structure. The hole extends through the insulating layer and the anti-reflective coating layer.
Another embodiment of the present invention relates to an integrated circuit manufactured by the process of removing an anti-reflective coating. The process includes stabilizing a mask layer disposed over a dielectric layer and utilizing the stabilized mask layer to remove the anti-reflective coating in a high temperature process.


REFERENCES:
patent: 5700737 (1997-12-01), Yu et al.
patent: 5930664 (1999-07-01), Hsu et al.

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