Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-10-31
2008-10-28
Elmore, Stephen C (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S158000, C711S221000, C370S394000, C709S216000, C709S229000
Reexamination Certificate
active
07444481
ABSTRACT:
A mechanism receives memory reads and writes from a packet processing engine, each memory access having an associated packet identifier. The mechanism is placed between a processing element and a memory system such that write data is buffered and information based upon both reads and writes is recorded. Information is maintained allowing the detection of memory conflicts. When a potential memory conflict is detected, the values associated with the potentially conflicting memory operations are compared. In cases where the values match, no conflict is signaled. Such a value checking mechanism reduces the number of restarts needed in certain cases.
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Elmore Stephen C
McDonnell Boehnen & Hulbert & Berghoff LLP
Teplin Application Limited Liability Company
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