Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-10-31
2009-02-03
Elmore, Stephen C (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S135000, C711S156000, C711S158000, C711S221000, C370S394000, C712S218000, C712S225000, C709S216000, C709S229000, C710S052000
Reexamination Certificate
active
07487304
ABSTRACT:
A mechanism receives start and done commands containing packet identifiers or sequence numbers from a packet processing engine for packets for which processing is being started and for which processing has completed respectively. Upon receiving a packet start command, an entry in an active packet list is created. Upon receiving a packet done command, the active packet list is updated. The oldest done packet in the active list is retired by flushing buffered write information to a memory system. The active packet list can be used in conjunction with a system supporting speculative reads and conflict detection. In some embodiments the packet start command is inferred from a read command containing a packet identifier or sequence number.
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Elmore Stephen C
McDonnell & Boehnen Hulbert & Berghoff
Teplin Application Limited
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