Packet processing architecture

Details Packet processing architecture Packet processing architecture

2008-07-15

2008-07-15

Flynn, Nathan J. (Department: 2154)

Electrical computers and digital processing systems: multicomput

Network computer configuring

Reconfiguring

C370S902000, C370S421000, C370S218000, C370S230000, C370S230100, C370S231000, C370S389000, C714S776000, C714S779000, C714S780000, C340S003210

Reexamination Certificate

active

07401134

ABSTRACT:
A system for processing data packets comprising a plurality of data processing blocks and a controller, which allows the configuration parameters used in processing the data blocks to be updated in each data processing blocks at the data packet boundary. The present invention involves a system that utilizes a handshaking method for synchronously exchanging data between data processing blocks, wherein the data processing blocks update configuration parameters based on the type of networking standard used. Each data processing block identifies a first data block in the data packet and transmits a first data signal along with a first output data block of the data packet, wherein the block updates the configuration parameters from the controller only when the first data signal is present. In this manner, the first data signal, which is indicative of the data packet boundary, is propagated along the sequence of data processing blocks.

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Search Report Dated Dec. 15, 2003.

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