Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-07-22
2008-07-22
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
Reexamination Certificate
active
11027971
ABSTRACT:
Packet data received by a network controller is parsed and at least a portion of a received packet is stored by the network controller in both a host memory of a system and also in a cache memory of the central processing unit of the system. Other embodiments are described and claimed.
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Brandeburg Jesse C.
Connor Patrick L.
Deuskar Prafulla Shashikant
Leech Christopher David
Ronciak John Anthony
Dare Ryan
Intel Corporation
Kim Matthew
Konrad Raynes & Victor LLP
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