Packet communication apparatus

Details Packet communication apparatus Packet communication apparatus

2004-08-20

2008-09-23

Chaudry, Mujtaba K. (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S769000

Reexamination Certificate

active

07428690

ABSTRACT:
A packet communication apparatus, which includes a CPU, a memory, and a packet communication circuit, acts as an interface between a network-connected controlled object and a network terminal that remotely monitors and controls the controlled object, and transmits and receives a packet between the controlled object and the network terminal, further includes a copy and operation unit that is a hardware unit for executing the checksum calculation to check for a packet error and the copy operation. The copy and operation unit performs the packet data copy operation and the checksum calculation simultaneously between a sending buffer/receiving buffer, formed in the memory and used by the packet communication circuit, and a work area used by a communication processing program, thus reducing the load of the CPU and increasing the communication processing speed.

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Maclean et. al., An Outboard Processor For High Performance Implementation of Transport Layer Protocols, 1991, IEEE, pp. 1728-1732.

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