Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-02-27
2007-02-27
Bragdon, Reginald (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S100000, C711S154000, C711S170000
Reexamination Certificate
active
10742189
ABSTRACT:
In general, in one aspect, the disclosure describes a method of assembling a packet in memory. The method includes reading data included in a first segment of a packet divided into multiple segments and issuing a command to a memory controller that causes the memory controller to shift and write a subset of the read data to a memory coupled to the memory controller. The method also includes saving the remainder of the read data as a first residue, retrieving data included in a second segment of the packet, and writing at least a portion of the retrieved data and the first residue to the memory.
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Chandra Prashant R.
Kuo Chen-Chi
Lakshmanamurthy Sridhar
Natarajan Rohit
Rosenbluth Mark
Bragdon Reginald
Greenberg Robert A.
Intel Corporation
Song Jasmine
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