Packed system of semiconductor chips having a semiconductor...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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C257S781000, C257SE21503

Reexamination Certificate

active

07573139

ABSTRACT:
A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215) at the ends of the vias. A semiconducting interposer surface may include discrete electronic components or an integrated circuit. One or more semiconductor chips (202, 203) have a dimension (220, 230) narrower than the interposer dimension, and an active surface with terminals and non-reflow metal studs (224, 234). One chip is flip-attached to the first interposer surface, and another chip to the second interposer surface, so that the interposer dimension projects over the chip dimension. An insulating substrate (204) has terminals and reflow bodies (242) to connect to the studs of the projecting interposer.

REFERENCES:
patent: 6815254 (2004-11-01), Mistry et al.
patent: 6933612 (2005-08-01), Kimura
patent: 7268418 (2007-09-01), Wang
patent: 2003/0134450 (2003-07-01), Lee
patent: 2006/0001179 (2006-01-01), Fukase et al.

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