Packaging with base layers comprising alloy 42

Details Packaging with base layers comprising alloy 42 Packaging with base layers comprising alloy 42

2006-10-27

2010-11-09

Jackson, Jr., Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Portion of housing of specific materials

C257S698000, C257S700000, C257S712000, C257S713000, C257S720000, C257S758000, C257SE23005, C257SE23006

Reexamination Certificate

active

07830004

ABSTRACT:
A semiconductor packaging structure is provided. The structure includes a base layer comprising alloy42; die attached on a first side of the base layer; and an interconnect structure on the die, wherein the interconnect structure comprises vias and conductive lines connected to the die.

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patent: 6744135 (2004-06-01), Hasebe et al.
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patent: 7400037 (2008-07-01), Yang et al.
patent: 7514767 (2009-04-01), Yang
patent: 2003/0122243 (2003-07-01), Lee et al.
patent: 2004/0173901 (2004-09-01), Mallik et al.
patent: 2004/0188825 (2004-09-01), Survakumar
patent: 2004/0214373 (2004-10-01), Jiang et al.
patent: 2006/0043568 (2006-03-01), Abe et al.

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