Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2002-11-07
2004-08-17
Eckert, George (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S698000, C257S725000, C438S107000, C438S110000
Reexamination Certificate
active
06777793
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a packaging substrate, more particularly, to a packaging substrate with electrostatic discharge protection.
2. Description of the Related Art
The working voltage of an integrated circuit is typically of 5 volts or less. When the integrated circuit is applied with relatively high voltage, the integrated circuit will usually be damaged. Static charge is generated from friction, induction and contact; but the popularly used chips are rarely designed with a circuit for electrostatic discharge protection to safeguard against damage to chips from static electricity. Most chips are not equipped with such an electrostatic protective circuit.
In addition, during the process of packaging or molding the dies, when the mould compound is injected to enclose the die, static charge will be generated from friction, induction and contact between the mould compound and the substrate or other medium. The electrostatic discharge will damage the die and fail the semiconductor package products.
Therefore, it is necessary to provide an innovative and advanced packaging substrate so as to solve the above problem.
SUMMARY OF THE INVENTION
One objective of the present invention is to provide a packaging substrate with electrostatic discharge protection. The packaging substrate is deposited into a packaging mold, and the packaging mold comprises a plurality of injection pins for pushing the packaging substrate out of the packaging mold. A first copper-mesh layer and a second copper-mesh layer of the packaging substrate are electrically connected to each other via position pins. A bottom side of the packaging substrate comprises a plurality of recesses in positions corresponding to positions of the injection pins. The recesses pass the second copper-mesh layer to electrically connect the injection pins to the second copper-mesh layer, and static electric charges are conducted to the injection pins via the second copper-mesh layer and away from the packaging substrate. It prevents dies to be packaged from damage due to electrostatic discharge so as to raise the yield rate of semiconductor package products.
Therefore, the packaging substrate according to the invention can safely conduct the static electricity generated during packaging away from the packaging substrate, preventing the dies to be packaged from damage due to electrostatic discharge.
REFERENCES:
patent: 5185654 (1993-02-01), Mosher et al.
patent: 6613979 (2003-09-01), Miller et al.
patent: 2003/0102016 (2003-06-01), Bouchard
patent: 2004/0048009 (2004-03-01), Extrand et al.
patent: 59225550 (1984-12-01), None
Lee Meng-Tsang
Lo Kuang-Lin
Advanced Semiconductor Engineering Inc.
Eckert George
Seyfarth Shaw LLP
Warren Matthew E.
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