Packaging method for integrated circuits

Details Packaging method for integrated circuits Packaging method for integrated circuits

2006-07-11

2006-07-11

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S464000

Reexamination Certificate

active

07074651

ABSTRACT:
A packaging method for integrated circuits comprising processes such as wafer grinding, wafer mount, wafer saw, die attach, etc., multiple singulated chips are each attached and assembled to leadframe unit, the leadframe unit is used as electrical out-connecting component for each chip, and the wire-bonding part of the chip is dispensed continuously with encapsulant material to seal, curing method is further applied to solidify the encapsulant, then saw or punching method is used to dice apart each chip accompanied with leadframe unit (singulation process), a ready-to-use integrated circuit is thus obtained, such manufacturing processes let the goals of easy-to-manufacture, fast production and lowered-production cost be easily achieved for the packaging and singulating processes.

REFERENCES:
patent: 5250843 (1993-10-01), Eichelberger
patent: 6342434 (2002-01-01), Miyamoto et al.
patent: 6419746 (2002-07-01), Banno et al.
patent: 6503831 (2003-01-01), Speakman
patent: 2004/0113283 (2004-06-01), Farnworth et al.
patent: 2004/0188864 (2004-09-01), Boon et al.

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