Packaging method for an electronic element

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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Details

C438S123000, C438S124000, C438S111000, C438S112000, C257S666000, C257S676000, C257S692000, C257S781000, C257S787000

Reexamination Certificate

active

07459345

ABSTRACT:
A packaging method for an electronic element has: etching portions of a top surface of a metal board to form recesses between raised unetched segments and filling the recesses with a dielectric material of high density polymer; forming multiple solder balls respectively on the raised unetched segments; coating the solder balls with a thin flux layer; bonding contacts on a die respectively to the solder balls with the thin flux layer; injecting an encapsulant between the die and the metal board; sealing the die with an outer encapsulant; etching a bottom surface of the metal board to form multiple metal leads; coating the bottom surface of the metal board other than the metal leads with a solder resist; and conducting a continuity test. The solder balls are not formed directly on the fragile die so the packaging method can be used with any types of dies and has a good applicability.

REFERENCES:
patent: 6404214 (2002-06-01), Muramatsu et al.
patent: 6667190 (2003-12-01), Kung et al.
patent: 6911624 (2005-06-01), Koopmans
patent: 6987030 (2006-01-01), Mita
patent: 7023022 (2006-04-01), Eliashevich et al.
patent: 7052935 (2006-05-01), Pai et al.
patent: 2002/0180064 (2002-12-01), Hwan et al.

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