Packaging integrated circuits for high stress environments

Details Packaging integrated circuits for high stress environments Packaging integrated circuits for high stress environments

2008-07-10

2010-10-12

Fahmy, Wael M (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Encapsulated

With specified encapsulant

C257S669000, C257S674000, C257S701000, C257S729000, C257SE23031, C257SE23112, C257SE23126

Reexamination Certificate

active

07812463

ABSTRACT:
One aspect of the invention pertains to a semiconductor package suitable for use in high stress environments, such as ones involving high pressures, temperatures and/or corrosive substances. In this aspect, a die and leadframe are fully encapsulated in a first plastic casing. The first plastic casing is fully encapsulated in turn with a second plastic casing. The two casings have different compositions. The first plastic casing, for example, may be made of a thermoset plastic material and the second plastic casing may be made of a thermoplastic material. The first plastic casing may have recesses, indentations and/or slots suitable for securing it to the second plastic casing. In some embodiments, a corrosion resistant coating is added to the second plastic casing. Methods for forming semiconductor packages suitable for use in high stress environments are also described.

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U.S. Appl. No. 11/621,063, filed Jan. 8, 2007.

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