Packaging and mounting of spherical semiconductor devices

Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – With housing or contact structure

Reexamination Certificate

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C257S730000, C257S723000, C257S773000, C257S291000, C257S686000, C257S618000, C257S668000, C257S738000, C257S678000, C257S724000, C257S684000, C257S691000, C361S783000, C361S736000, C361S767000, C439S068000, C174S050510

Reexamination Certificate

active

06326647

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to spherical semiconductor devices, and more specifically to the packaging and surface mounting of spherical semiconductor integrated circuit devices.
2. Description of Related Art
Conventional integrated circuits (ICs) are fabricated on flat silicon wafers. To begin the fabrication process, silicon is melted to form a large single crystal. The crystal is then cut, polished to a smooth finish, and heated in order to form a silicon wafer, which typically is three to twelve inches in diameter. Next, actual integrated circuits are fabricated on the wafer through a design-specific set of processing steps (such as mask patterning, implantation, deposition, diffusion, and etching). At this point, the ICs on the wafer are tested a first time to determine if each is operational. Then, the wafer is diced to separate the individual ICs, and the operational ICs are packaged in a plastic or ceramic molding to form a “chip.” The packaged ICs are then tested once again to insure that the completed device is functioning properly.
In such a wafer-based fabrication process, the number of ICs that are produced on each wafer depends on the size of the wafer and the size of the IC being fabricated. Recently, the wafer diameter has been increased in order to increase the manufacturing productivity and decrease the cost per IC device. However, each move to a larger wafer necessitates the purchase of expensive new manufacturing equipment and adds process complexity that can increase the defect rate. Further, when a matrix of individual ICs is formed on a wafer, the ICs must be spaced relatively far apart in order to facilitate their separation in the mechanical dicing process. Due to factors such as the required spacing and the defect rate, the aggregate area of the silicon wafer that yields functioning IC devices can be as low as 10%.
In order to overcome such inherent drawbacks in flat wafer-based IC fabrication, it has been proposed to form an IC device on a silicon sphere. According to this manufacturing process, single crystal silicon spheres (e.g., of one millimeter in diameter) are formed, and each sphere is processed so as to create circuit elements on its outer surface. Because such a one millimeter sphere has a surface area of only 3.14 mm
2
, large VLSI circuits cannot be formed on a single sphere. However, larger circuits can be formed by combining multiple spheres in to a single device. In this respect, each sphere can be designed as a portion of a system (e.g., a RAM, ROM, logic circuit, or I/O circuit), and the spherical devices can be connected together to form a complete VLSI circuit. Additionally, the individual spheres can be designed to be “standardized” circuit portions to further simply the device manufacturing process.
The manufacturing of ICs as silicon spheres offers many advantages over conventional flat wafer rectangular ICs. For example, the processing of individual spheres significantly cuts the cycle time needed to form a final device and allows for single devices to be processed (as opposed to batch processing of devices on a wafer). Further, such spherical IC device manufacturing processes can greatly decrease the overall IC device manufacturing cost by eliminating the need for large dedicated clean rooms, by allowing over 90% of the required silicon material to end up in functioning devices, and by eliminating the need to purchase new manufacturing equipment each time technological advances necessitate larger circuit devices. However, while there has been success in fabricating circuit elements on silicon spheres, packaging and mounting schemes are needed in order to allow spherical IC devices to be incorporated into complete systems such as computers and mobile phones.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide packaged spherical semiconductor devices that are usable in a system and that can communicate with other devices in the system. A spherical semiconductor device includes at least one circuit element, at least one power pad, and at least one input/output interface. The circuit element is powered through a coupling with the power pad, and the circuit element communicates with other spherical devices or other system elements through the input/output interface. Thus, the spherical device can be combined with other spherical devices and/or mounted into a complete electronic system.
One embodiment of the present invention provides a spherical semiconductor device that includes at least one circuit element and at least one power pad connecting the circuit element to a supply voltage. Additionally, the circuit element can communicate with at least one external device through at least one input/output interface. In a preferred embodiment, the at least one input/output interface includes an input pad, an output pad, an optical input interface, and an optical output interface.
Another embodiment of the present invention provides a circuit device formed on a printed circuit board. The circuit device includes power mounting pads connected to a supply voltage, ground mounting pads connected to ground, external connectors coupled to the pads through lines, and spherical semiconductor devices. Each of the spherical semiconductor devices includes at least one circuit element, at least one power pad connected to one of the power mounting pads, at least one ground pad connected to one of the ground mounting pads, and at least one input/output interface. The circuit element communicates with at least one external device through the input/output interface. In one preferred embodiment of the circuit device, the circuit device also includes input mounting pads and output mounting pads, and the at least one input/output interface includes an input pad connected to one of the input mounting pads and an output pad connected to one of the output mounting pads.
Yet another embodiment of the present invention provides an electronic system having a first printed circuit board. The first printed circuit board includes power mounting pads connected to a supply voltage, ground mounting pads connected to ground, external connectors coupled to the pads through lines, and spherical semiconductor devices. Each of the spherical semiconductor devices includes at least one circuit element, at least one power pad connected to one of the power mounting pads, at least one ground pad connected to one of the ground mounting pads, and at least one input/output interface for communicating with at least one external device. In a preferred embodiment of the system, the electronic system includes two such printed circuit boards that are connected to connection sockets of a motherboard, and at least one of the spherical semiconductor devices of one printed circuit board can communicate with at least one of the spherical semiconductor devices of the other printed circuit board through optical input and output interfaces.
Other objects, features, and advantages of the present invention will become apparent from the following detailed description. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the present invention, are given by way of illustration only and various modifications may naturally be performed without deviating from the present invention.


REFERENCES:
patent: 3596136 (1971-07-01), Fischer
patent: 4866683 (1989-09-01), Phillips
patent: 5047776 (1991-09-01), Baller
patent: 5403773 (1995-04-01), Nitta et al.
patent: 5877943 (1999-03-01), Ramamurthi
patent: 6005401 (1999-12-01), Nakata et al.
patent: 6072163 (2000-06-01), Armstron et al.
patent: 6084574 (2000-07-01), Bidiville
patent: 54-020685 (1979-02-01), None
patent: 59-021082 (1984-02-01), None
patent: 07-151940 (1995-06-01), None

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