Packaged integrated circuit device

Details Packaged integrated circuit device Packaged integrated circuit device

1998-04-15

1999-12-28

Clark, Sheila V.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

257706, 257707, 257775, 257692, H01L 2348, H01L 2352, H01L 2940

Patent

active

06008541&

ABSTRACT:
Disclosed herein is a packaged integrated circuit device having symmetrical structure to minimize package warpage and to prevent the formation of voids. The packaged integrated circuit device includes an integrated circuit chip having pads in the form of the respective grooves on its both sides opposite to each other. Each pad groove in the integrated circuit chip is formed such that it penetrates vertically the integrated circuit chip. The surface of each pad groove is coated with solder. A plurality of inner lead structures each including an inner lead and a stopper are inserted into the pad grooves and are electrically connected with the pads. In each of the inner lead structures, solder is coated on a surface of portion being in contact with the pads. Each inner lead has a plate shape and is inserted vertically into the respective pad grooves. Each stopper has a plate shape and is formed in the respective inner leads such that it is laid horizontally upon the upper surface of the integrated circuit chip to prevent the inner lead from breaking away from the pads. In one embodiment, on a top end of the respective inner leads is placed the top portion of each of the outer leads to be electrically connected to the respective inner leads, and each of the stoppers is formed at middle height portion of the respective inner leads.

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patent: 5545921 (1996-08-01), Conru et al.
patent: 5644476 (1997-07-01), Weekamp et al.

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