Package with barrier wall and method for manufacturing the same

Details Package with barrier wall and method for manufacturing the same Package with barrier wall and method for manufacturing the same

2007-01-23

2007-01-23

Nhu, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S779000, C257S787000, C257S774000, C257SE21008, C257S499000, C257S519000

Reexamination Certificate

active

10850110

ABSTRACT:
A ball grid array (BGA) package that may suppress flash contamination may include a flash contamination barrier wall. The barrier wall may be a portion of a copper pattern provided on a substrate. During a molding process, the flash contamination barrier may prevent a flash from contaminating a ball land. The barrier wall may restrict the flash to flow through a concave portion that may be defined by a surface of the substrate.

REFERENCES:
patent: 6429508 (2002-08-01), Gang
patent: 6498388 (2002-12-01), Kim et al.
patent: 6566168 (2003-05-01), Gang
patent: 2004/0262746 (2004-12-01), Jung

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