Package on package substrate

Details Package on package substrate Package on package substrate

2011-06-14

2011-06-14

Luu, Chuong A (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S777000, C257SE23141

Reexamination Certificate

active

07960822

ABSTRACT:
A package on package substrate is disclosed. The package on package substrate in accordance with an embodiment of the present invention can include a bottom package substrate, on which and an electronic element is mounted and of which an upper surface is formed with a bottom pad part and a solder resist part corresponding to the bottom pad part, and a top package substrate, which is stacked on an upper side of the bottom package substrate by interposing a solder between the top package substrate and the bottom package substrate and of which a lower surface is formed with a top pad part corresponding to the bottom pad part. The solder resist part can include a first solder resist layer, which is formed on the upper surface of the bottom package substrate, corresponding to the bottom pad part, and a second solder resist layer, which is formed on the first solder resist layer such that the bottom pad part is exposed.

REFERENCES:
patent: 7253510 (2007-08-01), Harvey
patent: 2003/0197260 (2003-10-01), Nishimura et al.
patent: 2008/0265391 (2008-10-01), Sterrett et al.
patent: 1999-002343 (1999-01-01), None
patent: 10-0746362 (2007-07-01), None
patent: 10-0803960 (2008-02-01), None
Korean Office Action issued in Korean Patent Application No. KR 10-2008-0113850 dated Apr. 30, 2010.

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